基于Cypress PSoC 63 MCU系列开发方案
cypress公司的psoc 63mcu系列是集成了arm® cortex™ cpu(单核和多核)的可升级和可配置的可编嵌入系统控制器,采用超低功耗40nm平台,包括有低功耗闪存和数字可编逻辑的双核微控制器(150-mhz arm cortex-m4f cpu和100-mhz cortex m0+ cpu),高性能模数和数模转换器,低功耗比较器以及标准通信和定时外设,并提供ble 5.0兼容的无线连接,可开发各种创新型物联网应用.主要用在可穿戴设备,个人医疗设备和无线音箱等.本文介绍了psoc 63mcu系列主要特性,框图,以及评估板cy8ckit-062-ble主要特性,框图和电路图.
psoc® is a scalable and reconfigurable platform architecture for a family of
programmable embedded system controllers witharm® cortex™ cpus (single and multi-core). the psoc 63 product family, based on an ultra low-power 40-nm platform, is a combinationof a dual-core microcontroller with low-power flash technology and digital programmable logic, high-performanceanalog-to-digital and digital-to-analog conversion, low-power comparators, and standard communication and timing peripherals. thepsoc 63 family provides wireless connectivity with ble 5.0 compliance.
psoc 63mcu系列主要特性:
32-bit dual core cpu subsystem
■ 150-mhz arm cortex-m4f cpu with single-cycle multiply(floating point and memory protection unit)
■ 100-mhz cortex m0+ cpu with single-cycle multiply and mpu.
■ user-selectable core logic operation at either 1.1 v or 0.9 v
■ inter-processor communication supported in hardware
■ 8 kb 4-way set-associative instruction caches for the m4 andm0+ cpus respectively
■ active cpu power consumption slope with 1.1-v core operationfor the cortex m4 is 40 μa/mhz and 20 μa/mhz for the cortexm0+, both at 3.3-v chip supply voltage with the internal buckregulator
■ active cpu power consumption slope with 0.9-v core operationfor the cortex m4 is 22 μa/mhz and 15 μa/mhz for the cortexm0+, both at 3.3-v chip supply voltage with the internal buckregulator
■ two dma controllers with 16 channels each
flash memory sub-system
■ 1 mb application flash with 32-kb eeprom area and 32-kbsecure flash
■ 128-bit wide flash accesses reduce power
■ sram with selectable retention granularity
■ 288-kb integrated sram
■ 32-kb retention boundaries (can retain 32 kb to 288 kb in32-kb increments)
■ one-time-programmable (otp) e-fuse memory for validationand security
bluetooth low energy (bluetooth smart) bt 5.0subsystem
■ 2.4-ghz rf transceiver with 50-ohmantenna drive
■ digital phy
■ link layer engine supporting master and slave modes
■ programmable output power: up to 4 dbm
■ rx sensitivity: –95 dbm
■ rssi: 4-db resolution
■ 5.7 ma tx (0 dbm) and 6.7 ma rx (2 mbps) current with 3.3-vbattery and internal simo buck converter
■ link layer engine supports four connections simultaneously
■ supports 2 mbps le data rate
low-power 1.7-v to 3.6-v operation
■ active, low-power active, sleep, low-power sleep, deepsleep, and hibernate modes for fine-grained powermanagement
■ deep sleep mode current with 64-kb sram retention is 7 μawith 3.3-v external supply and internal buck
■ on-chip single-in multiple out (simo) dc-dc buck converter,<1 μa quiescent current
■ backup domain with 64 bytes of memory and real-time-clock
flexible clocking options
■ on-chip crystal oscillators (high-speed, 4 to 33 mhz, andwatch crystal, 32 khz)
■ phase locked loop (pll) for multiplying clock frequencies
■ 8 mhz internal main oscillator (imo) with ±2% accuracy
■ ultra low-power 32 khz internal low-speed oscillator (ilo)with ±10% accuracy
■ frequency locked loop (fll) for multiplying imo frequency
serial communication
■ nine independent run-time reconfigurable serial communicationblocks (scbs), each is software configurable as i2c,spi, or uart
timing and pulse-width modulation
■ thirty-two timer/counter pulse-width modulator (tcpwm)blocks
■ center-aligned, edge, and pseudo-random modes
■ comparator-based triggering of kill signals
up to 78 programmable gpios
■ drive modes, strengths, and slew rates are programmable
■ six overvoltage tolerant (ovt) pins
packages
■ 116-bga and 104-mcsp packages with psoc 6 and bleradio
audio subsystem
■ i2s interface; up to 192 kilosamples (ksps) word clock
■ two pdm channels for stereo digital microphones
qspi interface
■ execute-in-place (xip) from external quad spi flash
■ on-the-fly encryption and decryption
■ 4-kb qspi cache for greater xip performance with lower power
■ supports 1, 2, 4, and dual-quad interfaces
programmable analog
■ 12-bit 1 msps sar adc with differential and single-endedmodes and sequencer with signal averaging
■ one 12-bit voltage mode dac with < 5-μs settling time
■ two opamps with low-power operation modes
■ two low-power comparators that operate in deep sleep andhibernate modes.
■ built-in temp sensor connected to adc
programmable digital
■ 12 programmable logic blocks, each with 8 macrocells and an8-bit data path (called universal digital blocks or udbs)
■ usable as drag-and-drop boolean primitives (gates, registers),or as verilog programmable blocks
■ cypress-provided peripheral component library using udbs toimplement functions such as communication peripherals (forexample, lin, uart, spi, i2c, s/pdif and other protocols),waveform generators, pseudo-random sequence (prs)generation, and many other functions.
■ smart i/o (programmable i/o) blocks enable booleanoperations on signals coming from, and going to, gpio pins
■ two ports with smart_io blocks, capability are provided; theseare available during deep sleep
capacitive sensing
■ cypress capacitive sigma-delta (csd) provides best-in-classsnr, liquid tolerance, and proximity sensing
■ mutual capacitance sensing (cypress csx) with dynamicusage of both self and utual sensing
■ wake on touch with very low current
■ cypress-supplied software component makes capacitivesensing design fast and easy
■ automatic hardware tuning (smartsense™)
energy profiler
■ block that provides history of time spent in different powermodes
■ allows software energy profiling to observe and optimizeenergy consumption
psoc creator design environment
■ integrated development environment provides schematicdesign entry and build (with analog and digital automaticrouting) and code development and debugging
■ applications programming interface (api component) for allfixed-function and programmable peripherals
■ bluetooth smart component (ble4.2 compliant protocol stack)with application level function calls and profiles
industry-standard tool compatibility
■ after schematic entry, development can be done witharm-based industry-standard development tools
■ configure in psoc creator and export to arm/keil or iar idesfor code development and debugging
■ supports industry standard arm trace emulation trace module
security built into platform architecture
■ multi-faceted secure architecture based on rom-based root oftrust
■ secure boot uninterruptible until system protection attributesare established
■ authentication during boot using hardware hashing
■ step-wise authentication of execution images
■ secure execution of code in execute-only mode for protectedroutines
■ all debug and test ingress paths can be disabled
cryptography accelerators
■ hardware acceleration for symmetric and asymmetriccryptographic methods (aes, 3des, rsa, and ecc) and hashfunctions (sha-512, sha-256)
■ true random number generator (trng) function
图1.psoc 63mcu系列框图
评估板cy8ckit-062-ble
thank you for your interest in the cy8ckit-062-ble psoc 6 ble pioneer kit. the psoc 6 blepioneer kit enables you to evaluate and develop your applications using the psoc 6 mcu withbluetooth low energy (ble) connectivity (hereafter called “psoc 6 mcu”).
psoc 6 mcu is cypress’ latest, ultra-low-power psoc specifically designed for wearables and iotproducts. psoc 6 mcu is a true programmable embedded system-on-chip, integrating a 150-mhzarm® cortex®-m4 as the primary application processor, a 100-mhz arm cortex®-m0+ thatsupports low-power operations, up to 1 mb flash and 288 kb sram, an integrated ble 4.2 radio,capsense® touch-sensing, and programmable analog and digital peripherals that allow higherflexibility, in-field tuning of the design, and faster time-to-market.
the psoc 6 ble pioneer board offers compatibility with arduino™ shields. the board features apsoc 6 mcu, a 512-mb nor flash, onboard programmer/debugger (kitprog2), usb type-c powerdelivery system (ez-pd™ ccg3), 5-segment capsense slider, two capsense buttons, one cap-sense proximity sensing header, an rgb led, two user leds, and one push button. the boardsupports operating voltages from 1.8 v to 3.3 v for psoc 6 mcu.
the cy8ckit-062-ble package includes a cy8ckit-028-epd e-ink display shield that containsa 2.7-inch e-ink display, a motion sensor, a thermistor, and a pdm microphone. the kit packagealso contains a cy5677 cysmart ble 4.2 usb dongle that is factory-programmed to emulate a blegap central device, enabling you to emulate a ble host on your computer.
you can use psoc creator™ to develop and debug your psoc 6 mcu projects. psoc creator iscypress’ standard integrated design environment (ide). psoc creator also supports exporting yourdesigns to other third party firmware development tools.
if you are new to psoc 6 mcu and psoc creator ide, you can find introductions in the applicationnote an210781 - getting started with psoc 6 mcu with bluetooth low energy (ble) connectivity.
the cy8ckit-062-ble package has the following contents.
■ psoc 6 ble pioneer board
■ cy8ckit-028-epd e-ink display shield
■ cy5677 cysmart ble 4.2 usb dongle
■ usb type-a to type-c cable
■ four jumper wires (4 inches each)
■ two proximity sensor wires (5 inches each)
■ quick start guide
图2. 评估板cy8ckit-062-ble组图外形图
评估板cy8ckit-062-ble主要特性:
■ psoc 6 mcu with ble connectivity
■ expansion headers that are compatible with arduino uno™ 3.3 v shields1 and digilent® pmod™modules
■ 512-mbit external quad-spi nor flash that provides a fast, expandable memory for data andcode
■ kitprog2 onboard programmer/debugger with mass storage programming, usb to uart/i2c/spi bridge functionality, and custom applications support
■ ez-pd ccg3 usb type-c power delivery (pd) system with rechargeable lithium-ion polymer (li-po) battery support2
■ capsense touch-sensing slider (5 elements), two buttons, all of which are capable of both selfcapacitance(csd) and mutual-capacitance (csx) operation, and a csd proximity sensor that letyou evaluate cypress’ fourth-generation capsense technology
■ 1.8 v to 3.3 v operation of psoc 6 mcu is supported. an additional 330 mf super-capacitor isprovided for backup domain supply (vbackup)
■ two user leds, a rgb led, a user button, and a reset button for psoc 6 mcu. two buttons andthree leds for kitprog2
图3.评估板psoc 6 ble pioneer板外形图(正面)
评估板psoc 6 ble pioneer板中数字内容为:
图4.评估板psoc 6 ble pioneer板框图
图5.评估板psoc 6 ble pioneer板电路图(1)
图6.评估板psoc 6 ble pioneer板电路图(2)
图7.评估板psoc 6 ble pioneer板电路图(3)
图8.评估板psoc 6 ble pioneer板电路图(4)
图9.评估板psoc 6 ble pioneer板电路图(5)
图10.评估板psoc 6 ble pioneer板电路图(6)
图11.评估板psoc 6 ble pioneer板电路图(7)
图12.评估板psoc 6 ble pioneer板电路图(8)
图13.评估板psoc 6 ble pioneer板电路图(9)
图14.评估板psoc 6 ble pioneer板电路图(10)
图15.评估板psoc 6 ble pioneer板电路图(11)
图16.评估板psoc 6 ble pioneer板电路图(12)
铁路专用的逆变器电源解决方案
回顾滤波电容在PCB设计中的作用
秀出花式年夜饭 华为畅享6S拍照美翻朋友圈
良胜贴片保险丝的概念、优点以及一般应用
选择家用逆变器的功率时需要注意哪些要求
基于Cypress PSoC 63 MCU系列开发方案
美国盟友出兵欲抢夺胜利果实！俄军发射巡航导弹打击逼其认怂
长江存储基地变电站正式投运,采取了两路电源可实现一秒都不断电！
叮咚智能音箱发布《第三方平台接入语音交互系统用户体验标准》
儿童滑板车哪个品牌比较好，两大热门型号的对比
中国电信正式成为十四运会官方合作伙伴
一个名为Metaverse的工具来帮助人们快速生成逼真的训练数据
打造中国台湾成为“全球研发制造服务中心”
电子芯闻动态：三星发布新处理器，采用14nm工艺
惠普企业公司Aruba推出了Aruba ESP
华为荣耀V9怎么样：荣耀V9全方位360度大解析，颜值炸裂小心被毒！
有礼丨哪个“镜头”让你给艾迈斯欧司朗点赞？
不间断电源的工频逆变电路IGBT选择
新尚AI羽毛球机器人 即将亮相2020中国高等教育博览会
美光计划削减存储芯片供应 行业触底信号已经出现
psoc® is a scalable and reconfigurable platform architecture for a family of
programmable embedded system controllers witharm® cortex™ cpus (single and multi-core). the psoc 63 product family, based on an ultra low-power 40-nm platform, is a combinationof a dual-core microcontroller with low-power flash technology and digital programmable logic, high-performanceanalog-to-digital and digital-to-analog conversion, low-power comparators, and standard communication and timing peripherals. thepsoc 63 family provides wireless connectivity with ble 5.0 compliance.
psoc 63mcu系列主要特性:
32-bit dual core cpu subsystem
■ 150-mhz arm cortex-m4f cpu with single-cycle multiply(floating point and memory protection unit)
■ 100-mhz cortex m0+ cpu with single-cycle multiply and mpu.
■ user-selectable core logic operation at either 1.1 v or 0.9 v
■ inter-processor communication supported in hardware
■ 8 kb 4-way set-associative instruction caches for the m4 andm0+ cpus respectively
■ active cpu power consumption slope with 1.1-v core operationfor the cortex m4 is 40 μa/mhz and 20 μa/mhz for the cortexm0+, both at 3.3-v chip supply voltage with the internal buckregulator
■ active cpu power consumption slope with 0.9-v core operationfor the cortex m4 is 22 μa/mhz and 15 μa/mhz for the cortexm0+, both at 3.3-v chip supply voltage with the internal buckregulator
■ two dma controllers with 16 channels each
flash memory sub-system
■ 1 mb application flash with 32-kb eeprom area and 32-kbsecure flash
■ 128-bit wide flash accesses reduce power
■ sram with selectable retention granularity
■ 288-kb integrated sram
■ 32-kb retention boundaries (can retain 32 kb to 288 kb in32-kb increments)
■ one-time-programmable (otp) e-fuse memory for validationand security
bluetooth low energy (bluetooth smart) bt 5.0subsystem
■ 2.4-ghz rf transceiver with 50-ohmantenna drive
■ digital phy
■ link layer engine supporting master and slave modes
■ programmable output power: up to 4 dbm
■ rx sensitivity: –95 dbm
■ rssi: 4-db resolution
■ 5.7 ma tx (0 dbm) and 6.7 ma rx (2 mbps) current with 3.3-vbattery and internal simo buck converter
■ link layer engine supports four connections simultaneously
■ supports 2 mbps le data rate
low-power 1.7-v to 3.6-v operation
■ active, low-power active, sleep, low-power sleep, deepsleep, and hibernate modes for fine-grained powermanagement
■ deep sleep mode current with 64-kb sram retention is 7 μawith 3.3-v external supply and internal buck
■ on-chip single-in multiple out (simo) dc-dc buck converter,<1 μa quiescent current
■ backup domain with 64 bytes of memory and real-time-clock
flexible clocking options
■ on-chip crystal oscillators (high-speed, 4 to 33 mhz, andwatch crystal, 32 khz)
■ phase locked loop (pll) for multiplying clock frequencies
■ 8 mhz internal main oscillator (imo) with ±2% accuracy
■ ultra low-power 32 khz internal low-speed oscillator (ilo)with ±10% accuracy
■ frequency locked loop (fll) for multiplying imo frequency
serial communication
■ nine independent run-time reconfigurable serial communicationblocks (scbs), each is software configurable as i2c,spi, or uart
timing and pulse-width modulation
■ thirty-two timer/counter pulse-width modulator (tcpwm)blocks
■ center-aligned, edge, and pseudo-random modes
■ comparator-based triggering of kill signals
up to 78 programmable gpios
■ drive modes, strengths, and slew rates are programmable
■ six overvoltage tolerant (ovt) pins
packages
■ 116-bga and 104-mcsp packages with psoc 6 and bleradio
audio subsystem
■ i2s interface; up to 192 kilosamples (ksps) word clock
■ two pdm channels for stereo digital microphones
qspi interface
■ execute-in-place (xip) from external quad spi flash
■ on-the-fly encryption and decryption
■ 4-kb qspi cache for greater xip performance with lower power
■ supports 1, 2, 4, and dual-quad interfaces
programmable analog
■ 12-bit 1 msps sar adc with differential and single-endedmodes and sequencer with signal averaging
■ one 12-bit voltage mode dac with < 5-μs settling time
■ two opamps with low-power operation modes
■ two low-power comparators that operate in deep sleep andhibernate modes.
■ built-in temp sensor connected to adc
programmable digital
■ 12 programmable logic blocks, each with 8 macrocells and an8-bit data path (called universal digital blocks or udbs)
■ usable as drag-and-drop boolean primitives (gates, registers),or as verilog programmable blocks
■ cypress-provided peripheral component library using udbs toimplement functions such as communication peripherals (forexample, lin, uart, spi, i2c, s/pdif and other protocols),waveform generators, pseudo-random sequence (prs)generation, and many other functions.
■ smart i/o (programmable i/o) blocks enable booleanoperations on signals coming from, and going to, gpio pins
■ two ports with smart_io blocks, capability are provided; theseare available during deep sleep
capacitive sensing
■ cypress capacitive sigma-delta (csd) provides best-in-classsnr, liquid tolerance, and proximity sensing
■ mutual capacitance sensing (cypress csx) with dynamicusage of both self and utual sensing
■ wake on touch with very low current
■ cypress-supplied software component makes capacitivesensing design fast and easy
■ automatic hardware tuning (smartsense™)
energy profiler
■ block that provides history of time spent in different powermodes
■ allows software energy profiling to observe and optimizeenergy consumption
psoc creator design environment
■ integrated development environment provides schematicdesign entry and build (with analog and digital automaticrouting) and code development and debugging
■ applications programming interface (api component) for allfixed-function and programmable peripherals
■ bluetooth smart component (ble4.2 compliant protocol stack)with application level function calls and profiles
industry-standard tool compatibility
■ after schematic entry, development can be done witharm-based industry-standard development tools
■ configure in psoc creator and export to arm/keil or iar idesfor code development and debugging
■ supports industry standard arm trace emulation trace module
security built into platform architecture
■ multi-faceted secure architecture based on rom-based root oftrust
■ secure boot uninterruptible until system protection attributesare established
■ authentication during boot using hardware hashing
■ step-wise authentication of execution images
■ secure execution of code in execute-only mode for protectedroutines
■ all debug and test ingress paths can be disabled
cryptography accelerators
■ hardware acceleration for symmetric and asymmetriccryptographic methods (aes, 3des, rsa, and ecc) and hashfunctions (sha-512, sha-256)
■ true random number generator (trng) function
图1.psoc 63mcu系列框图
评估板cy8ckit-062-ble
thank you for your interest in the cy8ckit-062-ble psoc 6 ble pioneer kit. the psoc 6 blepioneer kit enables you to evaluate and develop your applications using the psoc 6 mcu withbluetooth low energy (ble) connectivity (hereafter called “psoc 6 mcu”).
psoc 6 mcu is cypress’ latest, ultra-low-power psoc specifically designed for wearables and iotproducts. psoc 6 mcu is a true programmable embedded system-on-chip, integrating a 150-mhzarm® cortex®-m4 as the primary application processor, a 100-mhz arm cortex®-m0+ thatsupports low-power operations, up to 1 mb flash and 288 kb sram, an integrated ble 4.2 radio,capsense® touch-sensing, and programmable analog and digital peripherals that allow higherflexibility, in-field tuning of the design, and faster time-to-market.
the psoc 6 ble pioneer board offers compatibility with arduino™ shields. the board features apsoc 6 mcu, a 512-mb nor flash, onboard programmer/debugger (kitprog2), usb type-c powerdelivery system (ez-pd™ ccg3), 5-segment capsense slider, two capsense buttons, one cap-sense proximity sensing header, an rgb led, two user leds, and one push button. the boardsupports operating voltages from 1.8 v to 3.3 v for psoc 6 mcu.
the cy8ckit-062-ble package includes a cy8ckit-028-epd e-ink display shield that containsa 2.7-inch e-ink display, a motion sensor, a thermistor, and a pdm microphone. the kit packagealso contains a cy5677 cysmart ble 4.2 usb dongle that is factory-programmed to emulate a blegap central device, enabling you to emulate a ble host on your computer.
you can use psoc creator™ to develop and debug your psoc 6 mcu projects. psoc creator iscypress’ standard integrated design environment (ide). psoc creator also supports exporting yourdesigns to other third party firmware development tools.
if you are new to psoc 6 mcu and psoc creator ide, you can find introductions in the applicationnote an210781 - getting started with psoc 6 mcu with bluetooth low energy (ble) connectivity.
the cy8ckit-062-ble package has the following contents.
■ psoc 6 ble pioneer board
■ cy8ckit-028-epd e-ink display shield
■ cy5677 cysmart ble 4.2 usb dongle
■ usb type-a to type-c cable
■ four jumper wires (4 inches each)
■ two proximity sensor wires (5 inches each)
■ quick start guide
图2. 评估板cy8ckit-062-ble组图外形图
评估板cy8ckit-062-ble主要特性:
■ psoc 6 mcu with ble connectivity
■ expansion headers that are compatible with arduino uno™ 3.3 v shields1 and digilent® pmod™modules
■ 512-mbit external quad-spi nor flash that provides a fast, expandable memory for data andcode
■ kitprog2 onboard programmer/debugger with mass storage programming, usb to uart/i2c/spi bridge functionality, and custom applications support
■ ez-pd ccg3 usb type-c power delivery (pd) system with rechargeable lithium-ion polymer (li-po) battery support2
■ capsense touch-sensing slider (5 elements), two buttons, all of which are capable of both selfcapacitance(csd) and mutual-capacitance (csx) operation, and a csd proximity sensor that letyou evaluate cypress’ fourth-generation capsense technology
■ 1.8 v to 3.3 v operation of psoc 6 mcu is supported. an additional 330 mf super-capacitor isprovided for backup domain supply (vbackup)
■ two user leds, a rgb led, a user button, and a reset button for psoc 6 mcu. two buttons andthree leds for kitprog2
图3.评估板psoc 6 ble pioneer板外形图(正面)
评估板psoc 6 ble pioneer板中数字内容为:
图4.评估板psoc 6 ble pioneer板框图
图5.评估板psoc 6 ble pioneer板电路图(1)
图6.评估板psoc 6 ble pioneer板电路图(2)
图7.评估板psoc 6 ble pioneer板电路图(3)
图8.评估板psoc 6 ble pioneer板电路图(4)
图9.评估板psoc 6 ble pioneer板电路图(5)
图10.评估板psoc 6 ble pioneer板电路图(6)
图11.评估板psoc 6 ble pioneer板电路图(7)
图12.评估板psoc 6 ble pioneer板电路图(8)
图13.评估板psoc 6 ble pioneer板电路图(9)
图14.评估板psoc 6 ble pioneer板电路图(10)
图15.评估板psoc 6 ble pioneer板电路图(11)
图16.评估板psoc 6 ble pioneer板电路图(12)
铁路专用的逆变器电源解决方案
回顾滤波电容在PCB设计中的作用
秀出花式年夜饭 华为畅享6S拍照美翻朋友圈
良胜贴片保险丝的概念、优点以及一般应用
选择家用逆变器的功率时需要注意哪些要求
基于Cypress PSoC 63 MCU系列开发方案
美国盟友出兵欲抢夺胜利果实！俄军发射巡航导弹打击逼其认怂
长江存储基地变电站正式投运,采取了两路电源可实现一秒都不断电！
叮咚智能音箱发布《第三方平台接入语音交互系统用户体验标准》
儿童滑板车哪个品牌比较好，两大热门型号的对比
中国电信正式成为十四运会官方合作伙伴
一个名为Metaverse的工具来帮助人们快速生成逼真的训练数据
打造中国台湾成为“全球研发制造服务中心”
电子芯闻动态：三星发布新处理器，采用14nm工艺
惠普企业公司Aruba推出了Aruba ESP
华为荣耀V9怎么样：荣耀V9全方位360度大解析，颜值炸裂小心被毒！
有礼丨哪个“镜头”让你给艾迈斯欧司朗点赞？
不间断电源的工频逆变电路IGBT选择
新尚AI羽毛球机器人 即将亮相2020中国高等教育博览会
美光计划削减存储芯片供应 行业触底信号已经出现