电流检测集成电路阻止过损伤-Current-Sense IC
abstract: this application note describes the use of a current-sense amplifier to monitor the load current of a circuit supply voltage. when the current being drawn from the supply exceeds the predetermined level, an external pass transistor opens up to remove the load from the supply. a separate external transistor crowbars the input to the load to prevent overvoltage. the off state is latched until the circuit is reset manually.
cmos interface ics serve as gateways to the wired connections between electronic systems. if those external connections are mishandled, the interface ics can be damaged by a short to ground or by applied voltage that causes them to latch up. for short periods, however, short circuits and latchups are generally safe. (latchups can be triggered by pulling the gate terminal below ground or above vcc.)
in figure 1, ic1 monitors supply current to the interface circuitry (is), and quickly removes current and voltage from the interface if is exceeds a programmed threshold. during normal operation, ic1's out current (1/2000 of is) flows through r3 to a logic-low level—the output of ic2's lower nor gate.
figure 1.by blocking the supply current and crowbarring the supply voltage, this circuit protects the interface circuitry against faults involving the external lines.
during a fault condition (defined as is > 50ma by the r3 value shown), the rising out current develops 1.2v across r3, causing the set/reset flip-flop (ic2) to produce a low-to-high transition at pin 4. this action shuts down the interface: q1 blocks the interface supply current, and q2 crowbars the interface supply to prevent overvoltage. without the crowbar, an external overvoltage fault could act through parasitic diodes in q1 and the interface ic to lift the main supply voltage. (a positive supply voltage tends to rise if the supply is asked to sink current.)
r3's connection to the flip-flop output instead of ground (as in most max471 circuits) introduces hysteresis in the control of q1 and q2. otherwise, oscillation can result: turning off q1 removes fault current, and the circuit tries to resume normal operation. r2 and d1 provide a break-before-make action that prevents q1 and q2 from shorting the supply rails. once tripped, the circuit remains latched until manually reset with s1.
an led with current-limiting resistor can be connected as a fault indicator between the main supply and the q1-q2 node. other add-on features include a capacitor across r3 to provide a slow-blow effect, and the use of a precision reference and comparator (such as the max931) for greater accuracy in sensing the r3 voltage.
a similar idea appeared in the 4/25/96 issue of edn.
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cmos interface ics serve as gateways to the wired connections between electronic systems. if those external connections are mishandled, the interface ics can be damaged by a short to ground or by applied voltage that causes them to latch up. for short periods, however, short circuits and latchups are generally safe. (latchups can be triggered by pulling the gate terminal below ground or above vcc.)
in figure 1, ic1 monitors supply current to the interface circuitry (is), and quickly removes current and voltage from the interface if is exceeds a programmed threshold. during normal operation, ic1's out current (1/2000 of is) flows through r3 to a logic-low level—the output of ic2's lower nor gate.
figure 1.by blocking the supply current and crowbarring the supply voltage, this circuit protects the interface circuitry against faults involving the external lines.
during a fault condition (defined as is > 50ma by the r3 value shown), the rising out current develops 1.2v across r3, causing the set/reset flip-flop (ic2) to produce a low-to-high transition at pin 4. this action shuts down the interface: q1 blocks the interface supply current, and q2 crowbars the interface supply to prevent overvoltage. without the crowbar, an external overvoltage fault could act through parasitic diodes in q1 and the interface ic to lift the main supply voltage. (a positive supply voltage tends to rise if the supply is asked to sink current.)
r3's connection to the flip-flop output instead of ground (as in most max471 circuits) introduces hysteresis in the control of q1 and q2. otherwise, oscillation can result: turning off q1 removes fault current, and the circuit tries to resume normal operation. r2 and d1 provide a break-before-make action that prevents q1 and q2 from shorting the supply rails. once tripped, the circuit remains latched until manually reset with s1.
an led with current-limiting resistor can be connected as a fault indicator between the main supply and the q1-q2 node. other add-on features include a capacitor across r3 to provide a slow-blow effect, and the use of a precision reference and comparator (such as the max931) for greater accuracy in sensing the r3 voltage.
a similar idea appeared in the 4/25/96 issue of edn.
车载红外光幕系统 无触摸屏的解决方案
荷兰出新规！ASML部分DUV***将禁运，国产半导体设备发展别无选择
植物生理生态监测系统的功能特点是什么
软驱基本结构及软盘控制器
2018年镜头出货量九强名单曝光
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快讯：王俊凯解除与英特尔合作关系 腾讯向股东派发京东股票意味着啥 中国稀土集团有限公司成立
Piccolo USB工具
中国电信的线下渠道已经成为主力军
大功率二极管晶闸管知识连载——控制特性
我国中小制造企业数字化转型现状
智能家居的战场硝烟谁点燃的
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